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Powerchip 55nm lcd driver salicide process hv hvt 9 track eco m1 cell library IP Listing
UMC 55nm ULP/HVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C90). W/O deep Nwell. UMC 55nm ULP/HVT Low-K Logic Process Process 6-track ECO M1 Cell Library (C60) w/ Forward Bias. W/ deep ...
Design-Reuse20 天
SMIC I/O Library IP Core
Analog I/OS and power line ESD solutions All voltage domains (0.75V to 5V) Additional voltage (e.g. 12V in 28nm proven) Ultra-low leakage Low parasitic capacitance SMIC 0.18um Logic 1P6M Salicide 1.8V ...