I/Os are integrated for loop back to serializer macro for link testing purposes. Layout is designed using IBM CMOS10LPE 5_01_00_01_LD metal stack. Control functions and layout configuration can be ...

The 4-Channel LVDS Deserializer is a high performance 4-channel LVDS Receiver implemented using digital CMOS technology. Both the serial and parallel data are organized into four channels. The ...

At the other end, it converts the serial data back to parallel. See UART. THIS DEFINITION IS FOR PERSONAL USE ONLY. All other reproduction requires permission.