Design-Reuse28 天
Amphion first : MPEG-2 core for FPGA implements video decode in single programmable logic ...
Amphion follows high-definition MPEG-2 4:2:2P@ML core for ASIC with standard-definition MPEG-2 MP@ML core for single FPGA Belfast, N. Ireland (September 24, 2001) - Amphion Semiconductor Ltd. today ...
Design-Reuse1 个月
Amphion launches high-definition MPEG-2 core solution for consumer digital TV products and HDTV
Amphion's new ASVC for MPEG-2 Video Decode with embedded SDRAM controller spans current and future decompression applications in DTV, set-top box, DVD, PC video, HDTV CES 2001, Las Vegas (January 8, ...